Cloud imperative for semiconductor design workloads
August 20, 2021
August 20, 2021
Today’s market forces have changed the paradigm for semiconductor manufacturers from “innovate to succeed” to “innovate or perish.” High tech customers want microprocessors tailored to their specific needs. Device design has become impossible without automated semiconductor design software that requires massive compute and data storage capacity. Hence, computing models for running automated semiconductor design workloads on premises need to evolve and chip manufacturers must explore alternative deployments for their design workloads.
Different deployment models offer varying degrees of scalability and cost benefits. Considering organizational priorities, companies can match-up with the best model that will help them succeed in the modern environment.
Electronic design automation (EDA) software is an essential part of chip development, but it is highly resource intensive and complex. Analog design requires different tools and methodologies than digital design, each having their own challenges to cloud execution and compute needs. For optimal performance, the hardware configuration needs to be tailored to the application.
A semiconductor high-performance compute (HPC) environment involves enormous capital investment as well as EDA software licensing fees, which scale with infrastructure.
State of EDA on Cloud today: While EDA applications today run mostly on premises, in the long term, the greater value for both EDA vendors and clients would be in the software becoming cloud native.
Immediate access to compute and storage resources by CSPs. The latency issues are addressed by on-premises private clouds.
CSPs offer sophisticated tools and services for innovation. Design teams can leverage software tools from the EDA ecosystem.
Instant access to compute and storage resources enhances productivity, enabling simultaneous testing while helping boost efficiency.
Presenting a comprehensive view of the various functions by timelines, time for closure and any potential roadblocks.
Hyperscalers offer a comprehensive suite of automated tools, state-of-the-art best practices like encryption of data in flight and at rest.
The choice of deployments for semiconductor design workloads depends on a number of factors, including where the enterprise is in its corporate journey. Unlocking value requires a strategic approach.
EDA workloads require specific hardware configurations. It’s essential to match the workload to the appropriate instance to get optimal performance.
Data management should be a key consideration in the decision of which workloads to deploy to the public cloud and which to leave on premises.
As soon as the infrastructure-that is the tool for doing business-is provided by a CSP, companies should move capacity to a public infrastructure.
Organizations should run a pilot project to learn the process, uncover weaknesses and make any failures on a small scale.
Semiconductor companies should work with software vendors, CSPs, system integrators and/or server OEMs for guidance for a successful pivot.
For semiconductor companies, infrastructure is just a means for achieving their ultimate goal of designing and building chips. Moving EDA workloads to a flexible cloud infrastructure is the logical endpoint for the semiconductor industry. Hence, the chip companies should be focused on identifying a migration path to a flexible cloud infrastructure for their EDA workloads.
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