Today’s market forces have changed the paradigm for semiconductor manufacturers from “innovate to succeed” to “innovate or perish.” High tech customers want microprocessors tailored to their specific needs. Device design has become impossible without automated semiconductor design software that requires massive compute and data storage capacity. Hence, computing models for running automated semiconductor design workloads on premises need to evolve and chip manufacturers must explore alternative deployments for their design workloads.
Electronic design automation (EDA) software is an essential part of chip development, but it is highly resource intensive and complex. Analog design requires different tools and methodologies than digital design, each having their own challenges to cloud execution and compute needs. For optimal performance, the hardware configuration needs to be tailored to the application.
A semiconductor high-performance compute (HPC) environment involves enormous capital investment as well as EDA software licensing fees, which scale with infrastructure.
- Restricting semiconductor design workloads to private resources have drawbacks like security, value of the intellectual property (IP), ransomware attacks, the evolving threat environment, mismatch between resource need & availability and the engineering teams competing with one another for capacity.
- A hybrid cloud provides a scalable, elastic HPC environment with unlimited compute cycles and storage. It can use the public cloud for burst workloads, returning capacity to the cloud service provider (CSP) rather than maintaining idle servers, thus saving cost. The engineering teams get immediate access to compute, storage and analytics during needful times.
- For companies committed to maintaining their EDA workloads on premises, several server OEMs are offering flexible private compute models that provide cloud-level scalability while reducing total cost of ownership. During high demand periods, the company could immediately access these “cold” servers, paying a usage fee for the surge period only.
Moving to action
The choice of deployments for semiconductor design workloads depends on a number of factors, including where the enterprise is in its corporate journey. Unlocking value requires a strategic approach.
For semiconductor companies, infrastructure is just a means for achieving their ultimate goal of designing and building chips. Moving EDA workloads to a flexible cloud infrastructure is the logical endpoint for the semiconductor industry. Hence, the chip companies should be focused on identifying a migration path to a flexible cloud infrastructure for their EDA workloads.